The present disclosure relates generally to semiconductor fabrication and, more particularly, to a method of patterning a layer of a semiconductor device, including the fabrication of a masking element for such patterning.
The fabrication of semiconductor devices requires the formation of numerous features on a substrate such as, interconnect lines and other conductive layers, gate structures, doped regions, isolation regions, and/or other features known in the art. Formation of features such as these often requires a plurality of photolithography processes to pattern the feature. During a photolithography process, a masking element is formed on a substrate, the substrate including one or more layers of material. A masking element, typically a sacrificial patterned layer of photoresist, allows a portion of the substrate to be blocked, while exposing other portions. This allows for selective processing of the substrate, such as etching, ion implantation, and/or other processes known in the art. Forming a typical masking element requires coating the wafer with photoresist, exposing the photoresist to a soft bake, exposing the photoresist to a pattern, developing the photoresist, and exposing the photoresist to a hard bake.
One disadvantage to conventional semiconductor fabrication processes is the numerous steps required for fabrication of a feature on the substrate. For example, a process for the formation of a polycrystalline silicon (polysilicon) gate electrode may be required. In order to pattern a layer of polysilicon deposited on a substrate to form a gate electrode, a first masking element is formed to provide a pattern for substantially linear features. The polysilicon layer is then etched according to this pattern to form substantially linear features. The first masking element is removed from the substrate. A second masking element may then be then formed to provide a pattern for gaps in the previously formed substantially linear features. The polysilicon features are then etched according to this second pattern. Thus, two photolithography processes and two etching processes are required. The numerous steps required add costs to the fabrication including, for example, increased complexity of the processing and increased cycle time.
As such, an improved method of patterning a feature of a semiconductor device is desired.